1. Technical Field
The present disclosure generally relates to the design of integrated level shifter circuits that are operable at more than one power supply voltage.
2. Description of the Related Art
Some integrated circuits (ICs) are designed to operate at two different supply voltages—a first supply voltage for core functions, and a second supply voltage for interfacing functions. Typically, the second supply voltage is higher than the first supply voltage, because interface circuits normally operate at a higher voltage level than the core of the IC. A higher supply voltage level at the I/O pads is desirable to drive large electrical loads at optimum speed. A lower voltage supply level at the core enables use of advanced transistors that have thinner gate oxide. For such ICs to be used in, and to communicate with, external systems whose power supply voltages are higher, there is a need for voltage level matching by input-output (I/O) interface circuits within the IC. For such circuits that use at least two supply voltages, it is generally desirable for the core voltage supply to be shifted to a higher level to interface with external integrated circuits. A level shifter circuit can be used to translate the low voltage level signals to higher voltage level signals. Examples of existing level shifter circuits are disclosed in U.S. Pat. No. 6,954,100 to Dharne et al. and U.S. Pat. No. 6,963,226 to Chiang.
It has been observed that, when operating at lower core voltages, the core operating voltage may fail to exceed the threshold voltage, Vt, of metal-oxide-semiconductor (MOS) transistors, and as a result, the MOS devices do not turn on. In addition, at lower core voltages, if the MOS device does turn on, the transition from the off state to the on state occurs slowly, and thus the frequency of operation is reduced, or the device may even fail to function. In response to such problems, several level-shifting techniques were developed to reduce the Vt of NMOS devices in particular, and to adjust their operation frequency as well as incorporating a lower core supply voltage. However, conventional solutions have relied on the introduction of additional control circuitry into the level shifting circuit, which tends to increase the footprint of the circuit on an IC chip.